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Design verification engineer jobs Mechanical engineering BE BTech jobs freshers jobs


Design verification engineer jobs Mechanical engineering BE BTech jobs freshers jobs

 Design verification engineer jobs Mechanical engineering BE BTech jobs freshers jobs

 Table of contents (toc)

Job description design verification engineer :

Minimum Qualifications  design verification engineer :

  1. 3 to 5 years, equivalent experience in ASIC verification. 
  2. Highly motivated and be able to work both independently and as a member of team. 
  3. Experience in verifying designs at system level and block level using constrained random verification. 
  4. Expert in System Verilog and OVM/UVM based verification. 
  5. Strong experience in ASIC design verification flows and DV methodologies. 
  6. Strong and independent design debugging capability, programming and scripting language capability. 
  7. Strong knowledge of HDLs like Verilog, System Verilog including in-depth design understanding.   

Preferred Qualifications design verification engineer :

  • Strong SV/UVM fundamentals, Experience of building Testbenches from scratch. 
  • Experience developing assertion based verification and functional coverage Experience with Processor based SoC verification Familiarity with Simulation acceleration/Emulation   Minimum Qualifications  

 

Skills design verification engineer :  

 des, RTL Coding, SoC Verification, SystemVerilog, Universal Verification Methodology (UVM)  M.S./M.Tech, BS/BE (Electronics)    

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